Simplified etching technique for producing multiple undercut profiles

ABSTRACT

A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.

STATEMENT OF GOVERNMENT INTEREST

[0001] This invention was made with Government support under ContractNo. DABT63-93-C-0025 awarded by Advanced Research Projects Agency(ARPA). The Government has certain rights in this invention.

BACKGROUND OF THE INVENTION

[0002] The present invention relates to a semiconductor manufacturingtechnique that reduces the cost and complexity of producing multipleundercut profiles in the same material. For example, the presentinvention provides a simplified etch process capable of generating twodifferent undercut profiles in the same material, such as silicondioxide or the like, using a single lithographic step during themanufacture of flat panel field emission display (FED) devices.

[0003] Conventional semiconductor techniques commonly utilizelithographic techniques to selectively place a pattern on a work pieceduring manufacture. For example, lithography may be used to apply aresist pattern over a layer of material such as silicon dioxide. Anetching process then removes portions of the silicon dioxide that remainexposed after the photoresist pattern is printed over the silicondioxide layer. Such an etching process allows a manufacturer to obtain adesired structure in the underlying material. The photoresist pattern istypically removed after etching and the work piece may be processedfurther by the deposition of additional material layers and furtherselective etchings. Mechanical operations such as chemical-mechanicalplanarization (CMP) and other processes may also be used in themanufacturing process.

[0004] One difficulty that has been encountered in prior manufacturingtechniques is based on the requirement that the various layers of thesemiconductor device be aligned with a relatively high degree ofalignment accuracy. Unfortunately, lithographic printing techniques maybe somewhat limited in alignment accuracy and resolution. For example,one resist pattern may be slightly offset relative to the underlyingwork piece. If a subsequent resist layer is also offset, possibly in adirection different from the first offset direction then a defect mayresult, lowering the effective yield of the manufacturing process.Similarly, the resolution of the printing process might not allow forfine detail that would permit certain structures to be obtained. Thus,it may be necessary to introduce a relatively large “margin of error”into the manufacturing process by producing features that are largeenough to accommodate misalignments. Of course, this limits the degreeof miniaturization that may be achieved in the manufacturing operation.

[0005] Each photolithographic/etching step entails the expenditure oftime and resources, adding to the costs of manufacture. Moreover, eachphotolithographic/etching step carries with it the possibility of errorsor defects and, consequently, potentially reduced yields. Thus, from thestandpoint of size, cost and yield, it is desirable to minimize thenumber of photolithographic steps performed during the manufacturingoperation.

[0006] It is a primary objective of the present invention to provide asimplified etch process that avoids difficulties encountered in priorart manufacturing techniques, and is capable of producing two differentundercut profiles in a work piece using a single lithographic step. Thepresent invention may find application, for example, in the manufactureof flat panel field emission displays (FEDs). However, the invention isnot limited to FEDs and may be used in connection with manufacturingprocesses for other devices such as micromachines that may requireundercut structures within a base material.

BRIEF SUMMARY

[0007] In accordance with one aspect of the present invention, a methodfor producing an undercut profile in a work piece includes forming aresist pattern on a top surface of the work piece. Apertures in theresist pattern expose portions of the work piece where an undercutprofile is to be created. A first etch is performed on the portions ofthe work piece exposed by said resist pattern to remove material fromthe work piece and to create a selected undercut in the work piece. Asecond etch is then performed on the work piece to remove additionalmaterial from the work piece and to produce a polymer film which atleast partially fills the selected undercut created by the first etch. Athird etch removes yet more material from the work piece and creates anadditional selected undercut in the work piece. Finally, the resistpattern is stripped and the polymer film is removed.

[0008] The first etch and the third etch may each be a wet etch process,and the second etch may be a polymerizing dry etch process. The workpiece may be a single layer of material or may include a plurality ofmaterial layers wherein at least two of the material layers are formedof the same material.

[0009] In accordance with another aspect of the present invention, asimplified etch process capable of generating selected undercut profilesin a work piece performs a first wet etch of portions of the work pieceto create a first undercut in the work piece. A polymer film is thenformed over side surfaces of the first undercut to inhibit furtheretching of the first undercut during subsequent etching operations.Then, a second wet etch of portions of the work piece is performed tocreate a second undercut in the work piece. In a preferredimplementation the polymer film is formed by a polymerizing dry etch.The etching steps may be controlled by a resist pattern formed on thework piece prior to etching. The resist pattern and the polymer film arethen removed following the final etching step.

[0010] In accordance with vet another aspect of the present invention, amethod used in the manufacture of a flat panel field emission displayforms a resist pattern over a field emission display base structurewhich includes a plurality of material layers arranged on a substrate,with at least a first material layer and a second material layer beingformed of the same material. The resist pattern has a plurality ofapertures that define portions of the base structure that are to beetched. The first material layer is etched at the defined portions withan etching process that creates an undercut in the first material layer.The defined portions of the base structure are etched with apolymerizing etch process to form a polymer film at the undercut made inthe first material layer. The second material layer is then etched atthe defined portions with an etching process that creates an undercut inthe second material layer. After the second material layer is etched,the polymer film and the resist pattern are removed.

[0011] In one implementation, the first material layer and the secondmaterial layer are insulation layers formed of silicon dioxide. In thatcase, the steps of etching the first and second material layers are eachwet etch processes utilizing hydrogen fluoride. Moreover, the basestructure may include a top passivation layer of silicon nitride. Inthat case, a dry etch of the silicon nitride layer is performed at theportions of the base structure defined by the apertures in the resistpattern prior to etching the first layer.

[0012] In accordance with vet another aspect of the present invention, anon-horizontal surface of a first material is defined within asemiconductor device. The semiconductor device is exposed to a firstmaterial-etching substance and the non-horizontal surface is protectedfrom the material-etching substance. For example, the non-horizontalsurface may be protected by forming a polymer on the surface.

[0013] A further aspect of the invention provides a method for profilinga semiconductor device by providing a patterned mask over thesemiconductor material, performing a first etch of the material whileguiding the first etch with the mask, adding a polymer to an etchedportion of the material, and performing a second etch of the materialwhile guiding the second etch with the mask and the polymer.Additionally, in one aspect of the present invention, a method isprovided for producing multiple undercut profiles within a semiconductordevice. A plurality of levels is defined within the semiconductor deviceusing a plurality of etches. A polymer is generated on a side of atleast one of the levels after at least one etch of the plurality ofetches and at least one etch of said plurality of etches is performedafter the polymer is generated. As an example, the plurality of layersin the semiconductor device may be a plurality of layers within aninsulator.

[0014] These and other aspects of the present invention are set forth ingreater detail below and in the appended claims. It should be noted thatthe foregoing description of the various aspects of the invention is notexhaustive and should not be considered to limit the present invention.Instead, the invention is intended to cover various modifications andequivalent arrangements included within the scope of the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The objects, features, advantages and characteristics of thepresent invention will become apparent from the following detaileddescription of the preferred embodiment, when read in view of theaccompanying drawings, wherein:

[0016]FIG. 1(a) is a cross-sectional schematic drawing illustrating awork piece having a quantity substrate with a conductive layer and aresist pattern formed thereon;

[0017]FIG. 1(b) is a cross-sectional schematic drawing illustrating thework piece of FIG. 1(a) following a dry etch process;

[0018]FIG. 2(a) is a cross-sectional schematic drawing illustrating awork piece after initial manufacturing steps;

[0019]FIG. 2(b) is a cross-sectional view of the work piece illustratedin FIG. 2(a) following a wet etch process in accordance with one aspectof the present invention;

[0020]FIG. 2(c) is a cross-sectional view of the work piece illustratedin FIG. 2(b) following a polymerizing dry etch process;

[0021]FIG. 2(d) is a cross-sectional view of the work piece illustratedin FIG. 2(c) following a further wet etch process;

[0022]FIG. 2(e) is a cross-sectional view of the resultant work piece ofFIG. 2(d) following stripping of the resist material and cleaning;

[0023]FIG. 3 is an illustrative cross-sectional schematic drawing of aflat panel field emission display (FED) which may be constructedutilizing the features of the present invention;

[0024]FIG. 4(a) is a cross-sectional schematic drawing of a portion of awork piece that may be processed in accordance with the features of thepresent invention to produce a field emission display such as isillustrated in FIG. 3;

[0025]FIG. 4(b) is a cross-sectional schematic drawing of the work pieceportion of FIG. 4(a) following a dry etch process;

[0026]FIG. 4(c) is a cross-sectional schematic drawing of the work pieceportion of FIG. 4(b) following a wet etch process;

[0027]FIG. 4(d) is a cross-sectional schematic drawing of the work pieceportion of FIG. 4(c) following a polymerizing dry etch process;

[0028]FIG. 4(e) is a cross-sectional schematic drawing of the work pieceportion of FIG. 4(d) following a further wet etch process;

[0029]FIG. 4(f) is a cross-sectional schematic drawing illustrating thework piece portion of FIG. 4(e) after removal of the polymer depositedby the polymerizing dry etch;

[0030]FIG. 5(a) is a cross-sectional schematic drawing of a singlematerial work piece having a resist pattern formed thereon;

[0031]FIG. 5(b) is a cross-sectional schematic drawing of the work pieceof FIG. 5(a) following a first wet etch process;

[0032]FIG. 5(c) is a cross-sectional schematic drawing of the work pieceof FIG. 5(b) following a polymerizing dry etch process;

[0033]FIG. 5(d) is a cross-sectional schematic drawing of the work pieceof FIG. 5(c) following a second wet etch process;

[0034]FIG. 5(e) is a cross-sectional schematic drawing of the work pieceof FIG. 5(d) following stripping of the resist material and removal ofthe polymer film produced by the polymerizing dry etch process;

[0035]FIG. 6 is a cross-sectional schematic drawing illustrating anotherundercut profile that may be produced in a single layer materialutilizing a process similar to that illustrated in FIGS. 5(a) through5(e); and

[0036]FIG. 7 is a cross-sectional schematic drawing illustrating anotherundercut profile that may be produced in a single layer materialutilizing a process similar to that illustrated in FIGS. 5(a) through5(e).

DETAILED DESCRIPTION OF EXEMPLARY EMIBODIMENTS

[0037] The present invention is described in the context of exemplaryembodiments. However, the scope of the invention is not limited to theparticular embodiments described in the application. Rather, thedescription merely reflects what are currently considered to be the mostpractical and preferred embodiments, and serves to illustrate theprinciples and characteristics of the present invention. Those skilledin the art will recognize that various modifications and refinements maybe made without departing from the spirit and scope of the invention.

[0038] It is known that certain dry etch processes produce acarbonaceous polymer film on the work piece being etched. Such a polymerfilm can reduce the effectiveness of further etching and is ordinarilyviewed as a problem or nuisance that should be minimized or removedduring the etching process. See, e.g., S. Wolf and R. N Tauber, SiliconProcessing for the VLSI Era, Vol. 1—Process Technology, Lattice Press,1986, pp. 547-555. However, in accordance with one aspect of the presentinvention, a carbonaceous polymer film is purposely produced and allowedto remain on the work piece during further etching processes. Thepolymer film is then utilized in a way that permits a simplified etchprocess to produce a structure having multiple undercut profiles.

[0039] The formation of a carbonaceous polymer film on a work piece isdescribed briefly in connection with FIGS. 1(a) and 1(b). It should beappreciated that this description is merely for the background purposeof illustrating the formation of a polymer film during etching. Workersin the field will recognize various alternative arrangements to whichthe principles of the present invention may be applied. Referring now toFIG. 1(a), a work piece 2 includes a quartz substrate material 4 havinga horizontal surface 5 on which a conductive layer 6, such as chrome, isarranged. A resist pattern 8 is printed with a lithographic technique orotherwise formed on the work piece to act as an etch-guiding layerduring subsequent etching. Other techniques for applying the resistpattern are known in the art and would include, for example, coating thework piece 2 with a photoresist material, exposing the photoresist to alight pattern to cure the photoresist, and removing the uncured portionsof the photoresist.

[0040]FIG. 1(b) illustrates the work piece following a polymerizing dryetch process of the quartz substrate 4. As shown in FIG. 1(b), the dryetch process has removed a portion of the quartz substrate 4 that wasleft uncovered by an opening in the overlying resist pattern. During thedry etch process, a polymer film 10 is formed on the generally verticalface of the resist, and may include a pocket or void 12. As understoodin the art, such polymer films tend to develop on vertical surfaces ofthe work piece, including the material being etched, and obstructetching of the covered material unless the film is removed. The tendencyof polymer films to develop is higher in areas that are set back from anoverlapping portion such as the portion 8′.

[0041] In accordance with one aspect of the present invention, a polymerfilm may be utilized to selectively shield materials from furtheretching and thereby allow selected degrees of undercut structures to beproduced in the end product. In other words, the polymer may bepurposely used as an etch-guiding liner to protect a non-horizontalsurface from further etching. A non-limiting exemplary process inaccordance with this aspect of the invention is described in connectionwith FIGS. 2(a) through 2(e).

[0042]FIG. 2(a) illustrates an exemplary work piece 11 having a basesubstrate 12 formed, for example, of silicon or soda lime glass. Amaterial layer 14 of, for example, silicon dioxide (SiO₂) is formed ontop of the substrate 12, and subsequent material layers 16 and 18 areformed over the material layer 14. In this example embodiment, thematerial layer 16 may be a patterned conductive material layer such adoped polycrystalline silicon and/or an appropriate conductive metalsuch as chromium. The material layer 18 is formed of the same materialas layer 14, silicon dioxide in this example. A patterned resistmaterial is applied to the top surface of the silicon dioxide materiallayer 18 using conventional techniques.

[0043] It should be noted that various available techniques for forminga work piece structure such as is illustrated in FIG. 2(a) are wellknown in the art. Accordingly, the specific processes that may be usedin forming such a work piece need not be described here.

[0044] With reference to FIG. 2(b), a wet etch process utilizing, forexample, a hydrofluoric acid or hydrogen fluoride (HF) ambient may beused to etch the silicon dioxide material layer 18 at the locationexposed by the resist pattern 20. As shown, the HF wet etch creates anundercut in the silicon dioxide layer 18 beneath the resist 20. Thus,the resist 20 acts as a mask having openings through which the etchantcreates a first perimeter in the underlying material. The etch time andoperating parameters depend upon the desired degree of undercut, theetchant being used, the material being etched, and other factors, as iswell understood in the art. A detailed discussion of the specificparameters of a wet etch process that may be utilized in connection withFIG. 2(b) is therefore not provided herein.

[0045] Following the wet etch operation, a polymerizing dry etch processis applied to the silicon dioxide material layer 14. A number ofwell-known polymerizing dry etch processes using various ambients andoperating parameters are available. The particular dry etch techniqueutilized will depend on the particular application, and an appropriatetechnique may be readily selected and applied by workers ordinarilyskilled in etching. However, in the disclosed exemplary embodiment, adry etch which produces little undercut in the etched material is used.Depending on the particular application, it may also be possible toutilize a dry etch process that does create a degree of undercut in theetched material.

[0046] As shown in FIG. 2(c), the dry etch process fills the undercutportion of the silicon dioxide material layer 18 with a polymer film“plug” 22 which lines the exposed vertical surface of layer 18. Comparedto a wet etch, the dry etch used in this example has a reducedlikelihood of producing a significant undercut in the etched material.Thus, although a slight undercut of silicon dioxide layer 14 is shown inFIG. 2(c), the etched portion substantially underlies the area exposedby the resist pattern 20. It should be noted that FIG. 2(c) shows thesilicon dioxide material 14 completely etched through. However,particularly because the work piece will be exposed to further wetetching, it is not necessary for the silicon dioxide layer 14 to becompletely etched at this time.

[0047] After the dry etch, the work piece is again subjected to a wetetch process to establish an undercut in the silicon dioxide layer 14,as illustrated in FIG. 2(d). Again, the degree of undercut is determinedby the etching time and operating parameters employed in the wet etch.Undesired further etching of the silicon dioxide layer 18 is preventedby the presence of the polymer films 22. Thus, the material layer 14 mayhave a larger undercut than the overlying material layer 18. As aresult, a second perimeter is etched in the semiconductor material whilethe first perimeter is generally retained by virtue of the protectivepolymer lining 22. Finally, the resist 20 is stripped from the workpiece and the polymer film 22 is removed. The resulting structure isillustrated in FIG. 2(e).

[0048] The foregoing technique for producing multiple undercut profilesrequires only a single lithographic step. This provides significantbenefits over prior techniques that would require multiple lithographicsteps, and may find application in many technical areas. One such areais the manufacture of flat panel field emission displays (FEDs), asdescribed below. However, it should be understood that the broadestaspects of the present invention are not limited to the manufacture ofFEDs.

[0049]FIG. 3 is a cross-sectional schematic of a portion of a known flatpanel field emission display. In particular, a single display segment 30is depicted. Each display segment is capable of displaying a pixel ofinformation or a portion of a pixel as, for example, one green dot of ared/green/blue full-color triad pixel. A field emission display baseassembly 32 includes a patterned conductive material layer 34 providedon a base 36 such as a soda lime glass substrate. The conductivematerial layer 34 may be formed, for example, from doped polycrystallinesilicon and/or an appropriate conductive metal such as chromium. Theconductive material layer 34 forms base electrodes and conductors forthe field emission device.

[0050] Conical micro-cathode field emitter tips 38 are constructed overthe base 36 at the field emission cathode site. A base electroderesistive layer (not shown in FIG. 1) may be provided between theconductive material layer 34 and the field emitter tips 38. Theresistive layer may be formed, for example, from silicon that has beendoped to provide an appropriate degree of resistance. A low potentialanode gate structure or conductive grid 40 formed, for example, of dopedpolycrystalline silicon is arranged adjacent the field emitters 38. Aninsulating layer 42 separates the grid 40 from the base electrodeconductive material layer 34. The insulating layer 42 may be formed, forexample, from silicon dioxide.

[0051] Proper functioning of the emitter tips requires operation in avacuum. Thus, a plurality of columnar supports or spacers 44 is providedover the base assembly 32 to support a display screen 46 againstatmospheric pressure. The spacers 44 may be formed in a number ofconventional ways. Appropriate techniques for forming the spacers 44 aredisclosed, for example, in U.S. Pat. No. 5,205,770 issued Apr. 27, 1993to Lowrey et al., U.S. Pat. No. 5,232,549 issued Aug. 3, 1993 to Catheyat al., U.S. Pat. No. 5,484,314 issued Jan. 16, 1996 to Farnworth, andU.S. Pat. No. 5,486,126 issued Jan. 23, 1996.

[0052] In operation, the display screen 46 acts as an anode so thatfield emissions from the emitter tips 35, represented by arrows 48,strike phosphor coating 50 on the screen 46. The field emissions excitethe phosphor coatings 50 to generate light. A field emission is producedfrom an emitter tip when a voltage controller 52 establishes a voltagedifferential between the emitter tip and the anode structures.

[0053] Various techniques are known in the art for selectivelyactivating a display segment. For example, the grid 40 and screen 46could be held at a constant voltage potential and emitter tipsselectively switched through column and row signals. In such anarrangement, the patterned conductive material 34 which forms thecathode base electrodes is arranged as a matrix that is addressablethrough column and row control signals. Alternatively, the baseelectrode conductors could be arranged in rows and the grid 40 arrangedin columns perpendicular to the rows of cathode base electrodes. Rowcontrol address signals to the cathode base electrodes and columncontrol address signals to the grid column segments selectably activatedisplay segments. Finally, the cathodes could be held at a constantvoltage potential and a switched anode scheme utilized for the displayscreen 46.

[0054]FIG. 3 is intended to provide a general background overview of thestructure and operation of an FED. It is not meant to provide a detailedillustrated of each feature of an actual FED structure. However, it isuseful in understanding the application of the present inventiondescribed in connection with FIGS. 4(a) through 4(f).

[0055]FIG. 4(a) illustrates a portion of a base structure that may beused to manufacture a flat panel FED in accordance with another aspectof the present invention. This structure may be produced using standardpatterning techniques well known in the art. Briefly, the structureincludes a silicon substrate 60 having a conical cathode emitter tip 62formed thereon. An insulating silicon dioxide layer 64 is provided overthe substrate 60. Additional layers formed over the silicon dioxidelayer 64 include a conductive doped polycrystalline silicon(“polysilicon”) layer 66, an insulating silicon dioxide layer 68, ametal layer 70, an additional silicon dioxide insulating layer 72, and apassivating silicon nitride (Si₃N₄) layer 74. A resist pattern 76 may beformed over the silicon nitride layer 74 using a standard lithographictechnique.

[0056] Turning now to FIG. 4(b), the silicon nitride layer 74 isselectively etched by a dry etch process. As a result, an opening isestablished in the silicon nitride layer 74 over the cathode emitter tip62. Because the particular dry etchant utilized is chosen to etch thenitride layer 74, there is no significant etching of the underlyingsilicon dioxide layer 72.

[0057] A first wet etch of the silicon dioxide layer 7′ is performednext, as shown in FIG. 4(c). The wet etch creates an undercut orrecession in the silicon dioxide layer 72 under the end portions of theunderlying silicon nitride layer 74. Although the wet etch may remove aportion of the silicon dioxide layer 64, it is not necessary that thislayer be completely etched at this point.

[0058] With reference to FIG. 4(d), the first silicon dioxide wet etchis followed by a dry etch of the silicon dioxide layer 64. The dry etchcauses a polymer film 78 to build up in the undercut or recessed portionof the silicon dioxide layer 72. The polymer film 78 protects thesilicon dioxide layer 72 during later wet etching. Because the silicondioxide layer 64 will be subsequently subjected to a further wet etch,it is not necessary that the dry etch expose the cathode emitter tip 62.Instead, the operating parameters of the dry etch should be selected tooptimize creation of the polymer film 78.

[0059] The silicon dioxide dry etch is then followed by a second silicondioxide wet etch. The second silicon dioxide wet etch removes theportion of the silicon dioxide layer 64 remaining around the cathodeemitter tip 62 and establishes a desired degree of undercut or recessionin the silicon dioxide layer 64, as illustrated in FIG. 4(e). Uponcompletion of the second wet etch, the resist material 20 is strippedand the polymer film 78 is removed using, for example, an oxygen plasma.The resultant structure is shown in FIG. 4(f).

[0060] In summary, the base structure of FIG. 4(a) may be processed inaccordance with one aspect of the present invention to provide aresultant structure useful in manufacturing an FED. Specifically, in theexample process discussed above, the base structure is subjected to adry etch of the silicon nitride layer 74 to expose the underlyingsilicon dioxide layer 72. A wet etch of the silicon dioxide layer 72establishes an undercut that is then covered by a protective polymerfilm 78 during a polymerizing dry etch of the silicon dioxide. A secondwet etch of the silicon dioxide is then performed to remove a portion ofthe silicon dioxide layer 64 and expose the emitter tip 62. Finally, theresist material 20 is stripped and the polymer film 78 is removed toobtain the resultant structure shown in FIG. 4(f). This resultantstructure may then be subjected to further manufacturing steps to addspacers (see spacers 44 of FIG. 3) and a display screen.

[0061] The present invention is not limited to operation on multi-layerwork pieces. Indeed, the principles of the present invention may beutilized in a single layer material to create desired customcross-sectional profiles. Referring to FIG. 5(a), a material layer 80of, for example, silicon dioxide is provided with a resist pattern 82.

[0062] A first wet etch of the silicon dioxide material 80 is performedto produce the undercut portions 84 shown in FIG. 5(b). A dry etch thengenerates a protective polymer film 86 in the undercut portion andremoves additional silicon dioxide from the area 88 of FIG. 5(c). Next,a second wet etch produces the structure shown in FIG. 5(d), includingfurther undercut portions 90. Following stripping of the resist material82 and removal of the polymer film 86, the resultant structure of FIG.5(e) is obtained.

[0063] One possible use of the structure illustrated in FIG. 5(e) is inconnection with micromachines. In particular, the enlarged area definedby the undercut portions 90 can provide space for rotating members of amicromachine and the opening established by the smaller undercut portion84 can permit a drive shaft or the like to extend beyond the top surfaceof the silicon dioxide layer 80.

[0064] Shapes other than that illustrated in FIG. 5(e) are alsopossible. For example, certain etching processes are known to follow thelines of the crystal being etched. Such an etching process could be usedto produce a profile such as is illustrated in FIG. 6.

[0065] It is also possible to repeat the process described in connectionwith FIGS. 5(a) through 5(e) to produce undercut profiles having anumber of “steps,” as shown for example in FIG. 7. Specifically, theprofile of FIG. 7 could be produced by performing an additional dry etchfollowing the second wet etch (FIG. 5(d)). A third wet etch would followthe additional dry etch to produce a profile such as the profile shownin FIG. 7.

[0066] The structures and profiles produced in the manner describedabove are examples of may that may be produced in accordance with thefeatures and principles of the present invention. Thus, these structuresand profiles should be viewed as exemplary rather than as limiting.Those of ordinary skill in the art will recognize a number of additionalarrangements that may be produced in accordance with the features of thepresent invention.

[0067] Although the invention has been described in connection with whatis presently considered to be the most practical and preferredembodiments, it is to be understood that the invention is not to belimited to the disclosed embodiments, but on the contrary, is intendedto cover various modifications and equivalent arrangements includedwithin the spirit and scope of the appended claims.

What is claimed is:
 1. A method for producing an undercut profile in awork piece comprising the steps of: forming a resist pattern on a topsurface of said work piece, said resist pattern including apertureswhich expose portions of said work piece at which an undercut profile isto be created; performing a first etch on said work piece, said firstetch operating on the portions of said work piece exposed by said resistpattern to remove material from said work piece and create a selectedundercut in said work piece; performing a second etch on said workpiece; said second etch operating on said work piece to remove materialfrom said work piece under said resist pattern apertures, said secondetch further producing a polymer film which at least partially fills theselected undercut created by said first etch; performing a third etch onsaid work piece, said third etch operating on exposed portions of saidwork piece to remove material from said work piece and create anadditional selected undercut in said work piece; stripping said resistpattern; and removing said polymer film.
 2. The method of claim 1,wherein said first etch and said third etch are each a wet etch process.3. The method of claim 2., wherein said second etch is a polymerizingdry etch process.
 4. The method of claim 1, wherein said second etch isa polymerizing dry etch process.
 5. The method of claim 1, wherein saidwork piece is a single layer of material.
 6. The method of claim 1,wherein said work piece includes a plurality of material layers whereinat least two of the material layers are formed of the same material. 7.A simplified etch process capable of generating selected undercutprofiles in a work piece, comprising the steps of: performing a firstwet etch of portions of said work piece to create a first undercut insaid work piece; forming a polymer film over side surfaces of said firstundercut to inhibit further etching of said first undercut duringsubsequent etching operations; and performing a second wet etch ofportions of said work piece to create a second undercut in said workpiece.
 8. The simplified etch process of claim 7, wherein said polymerfilm is formed by a polymerizing dry etch.
 9. The simplified etchprocess of claim 7, including the preliminary step of applying a resistpattern over said work piece, and wherein said portions of the workpiece on which said first wet etch and said second wet etch areperformed are established by apertures in said resist pattern.
 10. Thesimplified etch process of claim 9, including the further steps ofstripping said resist pattern and removing said polymer film subsequentto said second wet etch.
 11. A method used in the manufacture of a flatpanel field emission display, comprising: forming a resist pattern overa field emission display base structure, said base structure including aplurality of material layers arranged on a substrate, wherein at least afirst material layer and a second material layer are formed of the samematerial, said resist pattern having a plurality of apertures whichdefine portions of said base structure which are to be etched; etchingsaid first material layer at the portions of said base structure definedby said apertures with an etching process which creates an undercut insaid first material layer; etching the portions of said base structuredefined by said apertures with a polymerizing etch process which forms apolymer film at the undercut in said first material layer; etching saidsecond material layer at the portions of said base structure defined bysaid apertures with an etching process which creates an undercut in saidsecond material layer; removing said polymer film; and removing saidresist pattern.
 12. The method of claim 11, wherein the step of etchingsaid first material layer is a wet etch process.
 13. The method of claim12, wherein said first material layer and said second material layer areinsulation layers formed of silicon dioxide, and wherein said step ofetching the first material layer and said step of etching the secondmaterial layer are each wet etch processes utilizing hydrogen fluoride.14. The method of claim 11, wherein said base structure includes a toplayer of silicon nitride, and wherein a dry etch of said silicon nitridelayer is performed at the portions of the base structure defined by saidapertures prior to etching said first layer.
 15. A method of processinga semiconductor device, comprising: defining a non-horizontal surface ofa first material within said semiconductor device; exposing saidsemiconductor device to a first material-etching substance; andprotecting said non-horizontal surface from said substance.
 16. Themethod in claim 15, wherein said step of protecting said non-horizontalsurface further comprises forming a polymer on said non-horizontalsurface.
 17. The method in claim 16, wherein said step of defining anon-horizontal surface further comprises defining a non-horizontalsurface underlying a generally horizontal surface.
 18. The method inclaim 17, wherein said step of defining a non-horizontal surface farthercomprises defining a non-horizontal surface underlying an additionalportion of said first material.
 19. The method in claim 18, wherein saidstep of defining a non-horizontal surface further comprises defining agenerally vertical surface.
 20. The method in claim 19, furthercomprising a step of exposing said semiconductor device to saidsubstance a second time.
 21. A method of profiling a semiconductordevice including a material, comprising: providing a patterned mask oversaid material; performing a first etch of said material while guidingsaid first etch with said mask; adding a polymer to an etched portion ofsaid material; and performing a second etch of said material whileguiding said second etch with said mask and said polymer.
 22. A methodof producing multiple undercut profiles within a semiconductor device,comprising: defining a plurality of levels within said semiconductordevice using a plurality of etches; generating a polymer on a side of atleast one of said plurality of levels after at least one etch of saidplurality of etches; and performing at least one etch of said pluralityof etches after said step of generating a polymer.
 23. The method inclaim 22, wherein said step of defining a plurality of levels furthercomprises defining a plurality of levels within an insulator included aspart of said semiconductor device.
 24. A method of establishingdifferent degrees of undercutting of a layer of a semiconductor device,comprising: undercutting said layer of said semiconductor device a firsttime; depositing a polymer alone an undercut portion of said layer; andundercutting said layer a second time.
 25. A method of forming asemiconductor device on a substrate, comprising: providing a bottomportion of a dielectric over said substrate; providing a top portion ofa dielectric over said bottom portion; exposing said top portion to afirst undercutting ambient; and exposing said bottom portion to a secondundercutting ambient while protecting said top portion from said secondundercutting ambient.
 26. The method in claim 25, wherein said methodfurther comprises providing a mask over said top portion of adielectric; said step of exposing said top portion further comprisesexposing said top portion through an opening in said mask; and said stepof protecting said top portion further comprises etching said topportion.
 27. The method in claim 26, wherein said step of exposing saidbottom portion further comprises exposing said bottom portion throughsaid opening in said mask and through an opening in said top portion;and wherein said step of etching said top portion further compriseslining said opening in said top portion with a polymer.
 28. The methodin claim 27, wherein said step of providing a top portion of adielectric further comprises providing a dielectric of a same type assaid dielectric of said bottom portion.
 29. The method in claim 28,wherein said step of providing a top portion of a dielectric furthercomprises providing a top portion discrete from said bottom portion. 30.The method in claim 29, wherein said step of exposing said bottomportion to a second undercutting ambient further comprises exposing saidbottom portion to a second undercutting ambient of a same type as saidfirst undercutting ambient.
 31. A method of developing an emitter siteincluding an emitter covered with a first dielectric layer and flankedby a conductive layer generally covering said first dielectric layer,wherein a second dielectric layer and an overlying layer cover saidfirst dielectric layer and said conductive layer, and wherein saidmethod comprises: causing said second dielectric layer to define arecession under said overlying layer; at least partially filling saidrecession with an etch protectant; and causing said first dielectriclayer to define a recession under said conductive layer at said emittersite.
 32. The method in claim 31, wherein said step of causing saidsecond dielectric layer to define a recession further comprises etchingsaid second dielectric layer; and said step of at least partiallyfilling said recession comprises further etching said second dielectriclayer.
 33. The method in claim 32, wherein said step of causing saidsecond dielectric layer to define a recession further comprises wetetching said second dielectric layer; and said step of at leastpartially filling said recession comprises dry etching said seconddielectric layer.
 34. The method in claim 33, wherein said step of dryetching said second dielectric layer further comprises depositing apolymer.
 35. The method in claim 34, wherein said step of causing saidsecond dielectric layer to define a recession further comprises creatingan opening within said overlying layer over said emitter.
 36. A methodof etching a material included within a semiconductor device,comprising: providing an etch-guiding layer over said material includedwithin said semiconductor device; defining a first sidewall within saidmaterial under said etch-guiding layer; providing an etch-guiding lineron said first sidewall; and defining a second sidewall within saidmaterial under said etch-guiding liner.
 37. A method of generating aplurality of etch profiles in a semiconductor device covered by a mask,comprising etching a first perimeter from said semiconductor devicethrough a first opening in said mask; etching a second perimeter undersaid first perimeter; and generally retaining said first perimeter whileetching said second perimeter.
 38. The method in claim 37, furthercomprising a step of providing a lining around said first perimeter; andwherein said step of generally retaining said first perimeter furthercomprises protecting said first perimeter with said lining.
 39. A methodof defining different profiles within at least one layer of asemiconductor device using a single mask over said layer, comprising:generally allowing etches of said layer through an opening in said mask;and preventing a particular etch from affecting a particular profile.40. The method in claim 39, wherein said step of preventing a particularetch from affecting a particular profile further comprises protectingsaid particular profile during an etch of a portion of said layer thatis lower than said particular profile.
 41. The method in claim 40,wherein said step of protecting said particular profile furthercomprises etching said particular profile.
 42. The method in claim 41,wherein said step of etching said particular profile further comprisespolymer etching said particular profile.
 43. The method in claim 41,wherein said step of etching said particular profile further comprisesdry etching said particular profile.
 44. A method of producing asemiconductor device, comprising wet etching said semiconductor device;reducing an effect of a subsequent wet etch on said semiconductordevice; and subsequently wet etching said semiconductor device.
 45. Themethod in claim 44, wherein said step of reducing an effect of asubsequent wet etch further comprises: producing a carbonaceous film onan etched portion of said semiconductor device; and allowing saidcarbonaceous film to remain on said semiconductor device during saidsubsequent wet etch.
 46. The method in claim 45, wherein said step ofwet etching said semiconductor device further comprises defining agenerally vertical sidewall from said etched portion, and said step ofproducing a carbonaceous film further comprises producing a carbonaceousfilm on said sidewall.
 47. The method in claim 46, further comprising astep of ultimately removing said carbonaceous film.
 48. A method ofprofiling a semiconductor device, comprising: providing a materialbetween an upper layer and a lower layer as part of said semiconductordevice; defining a first hole in said upper layer having a firstdiameter; defining a second hole in said material that is generallyconcentric to said first hole and has a second diameter larger than saidfirst diameter; plugging an area of said second hole between said firstdiameter and said second diameter with a carbonaceous polymer; anddefining a third hole in said lower layer.
 49. The method in claim 48,wherein said step of defining a third hole further comprises defining athird hole having a third diameter larger than said second diameter. 50.The method in claim 49, wherein said material is a dielectric and saidlower layer is a dielectric.
 51. The method in claim 50, wherein saidupper layer is a mask layer.